Clocks - Fujitsu MB90390 Series Hardware Manual

CHAPTER 5 CLOCKS
5.1

Clocks

The clock generation block controls the operation of the internal clock that controls
operation of the CPU and peripheral functions. This internal clock is called the machine
clock. One internal clock cycle is called one machine cycle. Other clocks include a
clock generated by source oscillation, called an oscillation clock, and a clock generated
by the internal PLL oscillation, called a PLL clock.
■ Clocks
The clock generation block contains the oscillation circuit that generates the oscillation clock. An external
oscillator is attached to this circuit. The oscillation clock can also be supplied by inputting an external clock
to the clock generation block. The clock generation block also contains the PLL clock multiplier circuit,
which generates six clocks whose frequencies are multiples of the oscillation clock frequency. The clock
generation block controls the oscillation stabilization wait time and PLL clock multiplication as well as
internal clock operation by changing the clock with a clock selector.
●
Oscillation clock (HCLK)
The oscillation clock is generated either from an external oscillator attached to the oscillation circuit or by
the input of an external clock.
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Main clock (MCLK)
The main clock, whose frequency is the oscillation clock frequency divided by 2, supplies the clock input
to the time-base timer and the clock selector.
●
PLL clock (PCLK)
The PLL clock is obtained by multiplying the oscillation clock frequency with the internal PLL clock
multiplier circuit (PLL oscillation circuit). Selection can be made from among six different PLL clocks.
●
Clock Modulator (CLOMO)
The clock modulator reduces the electromagnetic interference - EMI, by spreading the spectrum of the
clock signal over a wide range of different frequencies. The modulator provides two operation modes: 1)
phase modulation mode and 2) frequency modulation mode. Please refer to "CHAPTER 6 CLOCK
MODULATOR" for more detail.
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