Bus Status Register (Ibsr) - Fujitsu MB90390 Series Hardware Manual

CHAPTER 21 400 kHz I
21.2.1

Bus Status Register (IBSR)

The bus status register (IBSR) has the following functions:
• Bus busy detection
• Repeated start condition detection
• Arbitration loss detection
• Acknowledge detection
• Data transfer direction indication
• Addressing as slave detection
• General call address detection
• Address data transfer detection
■ Bus Status Register (IBSR)
This register is read-only, all bits are controlled by the hardware. All bits are cleared if the interface is not
enabled (EN = 0 in ICCR).
Figure 21.2-1 Configuration of the Bus Status Register (IBSR)
bit
Address:
0035A0
H
R
410
2
C INTERFACE
7 6 5 4 3 2 1
BB RSC AL LRB TRX AAS GCA
R R R R R R R
: Read only
: Initial value
0
IBSR
ADT
Initial value
0 0 0 0 0 0 0 0
B
R
bit 0
ADT Address data transfer bit
0 Incoming data in not address data (bus not in use)
1 Incoming data is address data
bit 1
GCA General Call Address bit
0 Generall call address not received as slave
1 General call address received as slave
bit 2
AAS
Addressed as slave bit
0 not addressed as slave
1 Addressed as slave
bit 3
TRX T r ansferring data bit
0 Not transmitting data
1 Transmitting data
bit 4
LRB Last received bit
0 Receiver did not acknowledge
1 Receiver did acknowledge
bit 5
AL Arbitration loss bit
0 No arbitration loss detected
1 Arbitration loss detected
bit 6
RSC Repeated start condition bit
0 Repeated start condition not detected
1 Bus in use, repeated start condition detected
bit 7
BB
0 Stop condition detected (bus idle)
1 Start condition detected (bus in use)
Bus busy bit