Receive And Transmit Error Counters (Rtec) - Fujitsu MB90390 Series Hardware Manual

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CHAPTER 23 CAN CONTROLLER
23.6.4

Receive and Transmit Error Counters (RTEC)

The receive and transmit error counters indicate the counts for transmission errors and
reception errors defined in the CAN specifications. These registers can only be read.
■ Receive and Transmit Error Counters (RTEC)
Figure 23.6-5 Configuration of the Receive and Transmit Error Counters
Address:
CAN0: 003705
CAN1: 003905
CAN2: 003B05
CAN3: 003D05
CAN4: 003F05
Address:
CAN0: 003704
CAN1: 003904
CAN2: 003B04
CAN3: 003D04
CAN4: 003F04
■ Receive and Transmit Error Counters (RTEC) Contents
Table 23.6-5 Function of Each Bit of the Receive and Transmit Error Counters (RTEC)
Bit name
TEC7 to TEC0:
bit15 to
Transmit error
bit8
counter bits
REC7 to REC0:
bit7 to bit0
Receive error
counter bits
476
bit
15
14
13
12
11
H
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0
H
H
R
R
R
R
R
H
H
bit
7
6
5
4
H
REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
H
H
R
R
R
R
R
H
H
These are transmit error counters.
TEC7 to TEC0 values indicate 0 to 7 when the counter value is more than 256, and the
subsequent increment is not counted for counter value. In this case, Bus Off is indicated
for the node status (NS1 and NS0 of control status register CSR = 11
These are receive error counters.
REC7 to REC0 values indicate 0 to 7 when the counter value is more than 256, and the
subsequent increment is not counted for counter value. In this case, Error Passive is
indicated for the node status (NS1 and NS0 of control status register CSR = 10
10
9
8
RTEC (upper)
Initial value
0 0 0 0 0 0 0 0
R
R
R
3
2
1
0
RTEC (lower)
Initial value
0 0 0 0 0 0 0 0
R
R
R
Function
B
B
).
B
).
B

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