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MCU
Clock
Reload
Counter
Clock
Outputs
REST
Reload
Value
Read
BGR02/03, BGR12/BGR13
Data
Bus
In this example the number of MCU clock cycles (cyc) after REST is then:
cyc = v - c + 1 = 100 - 90 + 1 = 11
where v is the reload value and c is the read counter value.
Note:
If UART2, UART3 is reset by setting SMR2/SMR3:UPCL, the Reload Counters will restart too.
●
Automatic restart (reception reload counter only)
In asynchronous UART2, UART3 mode if a falling edge of a start bit is detected the Reception Reload
Counter is restarted. This is intended to synchronize the serial input shifter to the incoming serial data
stream.
■ Clearing Reload Counters
The baud rate Generator register (BGR02/03 and BGR12/13) and the baud rate reload counters are cleared
to "0" by the MCU global reset and the counters stop. The reload counters are cleared to "0" by writing "1"
to the UPCL bit in the SMR2/SMR3 register. However the value stored in the reload register is kept
unchanged and the counters start from reload value immediately. Writing "1" to the REST bit does not clear
the counters and they restart from reload value immediately.
Figure 20.6-3 Reload Counter Restart Example
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CHAPTER 20 UART2, UART3
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: don't care
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