Fujitsu MB90390 Series Hardware Manual page 498

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CHAPTER 23 CAN CONTROLLER
■ Control Status Register (CSR-upper) Contents
Table 23.6-2 Function of Each Bit of the Control Status Register (Upper)
Bit name
TS:
bit15
Transmit status
bit
RS:
bit14
Receive status bit
bit13 to
Undefined
bit11
NT:
bit10
Node status
transition flag
NS1, NS0:
bit9, bit8
Node status bit 1
and 0
470
This bit indicates whether a message is being transmitted.
"0": Message not being transmitted
"1": Message being transmitted
This bit is "0" even while error and overload frames are transmitted.
This bit indicates whether a message is being received.
"0": Message not being received
"1": Message being received
While a message is on the bus, this bit becomes "1". Therefore, this bit is also "1" while
a message is being transmitted. This bit does not necessarily indicates whether a
receiving message passes through the acceptance filter.
As a result, when this bit is "0", it implies that the bus operation is stopped (HALT = 0);
the bus is in the intermission/bus idle or a error/overload frame is on the bus.
If the node status is changed to increment, or from Bus Off to Error Active, this bit is set
to "1".
In other words, the NT bit is set to "1" if the node status is changed from Error Active
(00
) to Warning (01
), from Warning (01
B
B
(10
) to Bus Off (11
), and from Bus Off (11
B
B
parentheses indicate the values of NS1 and NS0 bits.
When the node status transition interrupt enable bit (NIE) is "1", an interrupt is
generated. Writing "0" sets the NT bit to "0". Writing 1 to the NT bit is ignored. "1" is
read when a Read Modify Write (RMW) instruction is performed.
These bits indicate the current node status.
See Table 23.6-3 below for details.
Function
) to Error Passive (10
B
B
) to Error Active (00
B
), from Error Passive
). Numbers in
B

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