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CHAPTER 13 16-BIT I/O TIMER
■ Clearing the Counter Upon a Match with Output Compare Register 0 (4)
Figure 13.3-6 Clearing the Counter Upon a Match with Output Compare Register 0 (4)
Counter value
FFFF
H
BFFF
H
7FFF
H
3FFF
H
0000
H
Reset
Compare
register value
Interrupt
■ 16-bit Free-run Timer Timing
●
16-bit free-run timer clear timing (match with the compare register 0/4)
The counter can be cleared upon a reset, software clear, or a match with the compare register 0 (4). By a
reset or software clear, the counter is immediately cleared. By a match with compare register 0 (4), the
counter is cleared in synchronization with the count timing.
Figure 13.3-7 16-bit Free-run Timer Clear Timing (Match with the Compare Register 0/4)
φ
Compare
register value
Compare match
Counter value
202
Match
BFFF
H
N
N
Match
Time
0000
H
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