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■ Input Capture (2 Channels per One Module)
The three input capture modules consist of two 16-bit capture registers and control registers each
corresponding to two independent external input pins.
Input Capture 0 (channels IN0 and IN1) is assigned to Free-run Timer 0 and Input Capture 1 and 2
(channels IN2, IN3, IN4 and IN5) are assigned to Free-run Timer 1.
The 16-bit free-run timer values can be stored in the capture register and an interrupt is issued
simultaneously upon detection of an edge of a signal input from an external input pin.
●
The detection edge of an external input signal can be specified.
Rising, falling, or both edges
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Two input channels can operate independently.
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An interrupt can be issued upon a valid edge of an external input signal.
The intelligent I/O service can be activated upon an input capture interrupt.
■ Block Diagram of 16-bit I/O Timer
Figure 13.1-1 shows a block diagram of the 16-bit I/O timer.
Figure 13.1-1 Block Diagram of 16-bit I/O Timer
Control logic
Interrupt
16-bit free-run timer 0/1
16-bit timer
0/2/4/6
Output compare
Compare register 0
Output compare
1/3/5/7
Compare register 1
Input capture 0/2/4
Capture register 0
Input capture 1/3/5
Capture register 1
CHAPTER 13 16-BIT I/O TIMER
Clear
T Q
T Q
Edge selection
Edge selection
FRCK
OUT0
OUT2
OUT4
OUT6
OUT1
OUT3
OUT5
OUT7
IN0
IN2
IN4
IN1
IN3
IN5
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