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CHAPTER 2 CPU
■ ROM Area
●
Vector table area (address: FFFC00
This area is used as a vector table for vector call instructions, interrupt vectors, and reset vectors.
This area is allocated at the highest addresses of the ROM area. The start address of the corresponding
processing routine is set as data in each vector table address.
●
Program area (address: Up to FFFBFF
ROM is built in as an internal program area.
The size of built-in ROM differs for each model.
■ RAM Area
●
Data area (address: From 000100
The static RAM is built in as an internal data area.
The size of built-in RAM differs for each model.
●
General-purpose register area (address: 000180
Auxiliary registers used for 8-bit, 16-bit, and 32-bit arithmetic operations and transfer are allocated in this
area.
Since this area is allocated to a part of the RAM area, it can be used as ordinary RAM.
When this area is used as a general-purpose register, general-purpose register addressing enables high-
speed access with short instructions.
●
Extended intelligent I/O service (EI
This area retains the transfer modes, I/O addresses, transfer count, and buffer addresses.
Since this area is allocated to a part of the RAM area, it can be used as ordinary RAM.
■ I/O Area
●
Interrupt control register area (address: 0000B0
The interrupt control registers (ICR00 to ICR15) correspond to all peripheral functions that have an
interrupt function. These registers set interrupt levels and control the extended intelligent I/O service
2
(EI
OS).
●
Peripheral function control register area (address: 000020
This register controls the built-in peripheral functions and inputs and outputs data.
●
I/O port control register area (address: 000000
This register controls I/O ports, and inputs and outputs data.
28
to FFFFFF
)
H
H
)
H
to 0010FF
(for 4KByte))
H
H
to 00037F
H
2
OS) descriptor area (address: 000100H to 00017F
to 0000BF
H
to 00001F
H
)
H
)
H
to 0000AF
)
H
H
)
H
)
H
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