Table of Contents
Advertisement
13.3.3
16-bit Free-run Timer Operation
The 16-bit free-run timer starts counting from counter value "0000
released. The counter value is used as the reference time for the 16-bit output compare
and 16-bit input capture operations.
■ 16-bit Free-run Timer Operation
The counter value is cleared in the following conditions:
•
When an overflow occurs
•
When a match with the output compare register 0 (free-run timer 0) or output compare register 4 (free-
run timer 1) occurs (This depends on the mode.)
•
When "1" is written to the CLR bit of the TCCS register during operation
•
When "0000
•
Reset
An interrupt can be generated when an overflow occurs or when the counter matches with the compare
register 0 (4). (Compare match interrupts can be used only in an appropriate mode.)
■ Clearing the Counter by an Overflow
Counter value
FFFF
H
BFFF
H
7FFF
H
3FFF
H
0000
H
Reset
Interrupt
" is written to the TCDT register during stop
H
Figure 13.3-5 Clearing the Counter by an Overflow
CHAPTER 13 16-BIT I/O TIMER
" after the reset is
B
Overflow
Time
201
Advertisement
Table of Contents
