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CHAPTER 26 ADDRESS MATCH DETECTION FUNCTION
■ Program Address Detection Control Status Register (PACSR)
The program address detection control / status register (PACSR) controls the operation of the address
detection function.
Figure 26.2-2 Program Address Detection Control Status Registers (PACSR0/PACSR1)
R/W
: Readable and writable
Table 26.2-2 Function of Each Bit of PACSR1 and PACSR0
Bit name
bit15, bit14
Reserved bits
AD5E:
bit13
Address detect
register 1 enable
bit12
Reserved bit
AD4E:
bit11
Address detect
register 1 enable
bit10
Reserved bit
AD3E:
bit9
Address detect
register 1 enable
bit8
Reserved bit
bit7 to bit4
Reserved bits
AD1E:
bit3
Address detect
register 1 enable
bit2
Reserved bit
AD0E:
bit1
Address detect
register 0 enable
bit0
Reserved bit
546
Address:
bit
7
6
5
00009E
H
Reserved Reserved Reserved Reserved AD1E
R/W R/W R/W R/W
Address:
bit
15
14
13
00003B
H
Reserved Reserved
AD5E
Reserved AD4E
R/W R/W R/W R/W R/W R/W
Bit15, bit14 are reserved. Set these bits to "0" before setting PACSR1.
The AD5E bit is the operation permission bit for PADR5.
When this bit is "1", the address is compared with the PADR5 register. If they match,
the INT9 instruction is issued.
Bit12 is reserved. Set this bit to "0" before setting PACSR1.
The AD4E bit is the operation permission bit for PADR4.
When this bit is "1", the address is compared with the PADR4 register. If they match,
the INT9 instruction is issued.
Bit10 is reserved. Set this bit to "0" before setting PACSR1.
The AD3E bit is the operation permission bit for PADR3.
When this bit is "1", the address is compared with the PADR3 register. If they match,
the INT9 instruction is issued.
Bit8 is reserved. Set this bit to "0" before setting PACSR1.
Bit7 to bit4 are reserved. Set these bits to "0" before setting PACSR0.
The AD1E bit is the operation permission bit for PADR1.
When this bit is "1", the address is compared with the PADR1 register. If they match,
the INT9 instruction is issued.
Bit2 is reserved. Set this bit to "0" before setting PACSR0.
The AD0E bit is the operation permission bit for PADR0.
When this bit is "1", the address is compared with the PADR0 register. If they match,
the INT9 instruction is issued.
Bit0 is reserved. Set this bit to "0" before setting PACSR0.
4
3
2
1
0
Reserved
AD0E
Reserved
R/W R/W R/W R/W
12
11
10
9
8
Reserved
AD3E
Reserved
R/W R/W
Function
PACSR0
Initial value
0 0 0 0 0 0 0 0
B
PACSR1
Initial value
0 0 0 0 0 0 0 0
B
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