Juniper JUNOS 10.1 - CONFIGURATION GUIDE 1-2010 Configuration Manual page 60

JUNOS 10.1 Network Interfaces Configuration Guide
Part 5
Chapter 13
Chapter 14
Part 6
Chapter 16
Part 7
Chapter 17
Chapter 19
Chapter 21
Chapter 22
Chapter 23
Chapter 24
Part 8
Chapter 28
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List of Tables
Configuring ATM Interfaces
Configuring ATM Interfaces
Table 25: ATM1 and ATM2 IQ Supported Features ......................................294
Table 26: ILMI Support by Encapsulation Type ............................................300
Table 27: Shaping Rate Range by Interface Type .........................................328
Table 28: ATM1 Traffic-Shaping Rates .........................................................331
Table 29: EPD Threshold Range by Interface Type ......................................335
Table 30: ATM Logical Interface Encapsulation Types .................................339
Configuring ATM-over-ADSL Interfaces
Table 31: ATM-over-ADSL Operational Modes .............................................365
Table 32: ATM-over-ADSL Encapsulation Types ...........................................367
Configuring Frame Relay
Configuring Frame Relay
Table 33: PIC Support for Enhanced Frame Relay Encapsulation Types ......381
Configuring Channelized Interfaces
Channelized Interfaces
Table 34: Frame Relay DLCI Limitations for Channelized Interfaces ............396
Table 35: Per Unit Scheduler DLCI Limitations for Channelized
Interfaces ..............................................................................................397
Table 36: Protocol Family Combinations .....................................................397
Table 37: Clocking Capabilities by Channelized PIC Type ............................399
Table 38: Structural Differences: Channelized IQE PICs ...............................410
Table 39: Structural Differences: Channelized IQ PICs .................................411
Table 40: Structural Differences: Channelized PICs .....................................412
Configuring Channelized OC12/STM4 Interfaces
Table 41: OC12-to-DS3 Numbering Scheme ................................................454
Configuring Channelized STM1 Interfaces
Table 42: Channelized STM1-to-E1 Channel Mapping ..................................481
Table 43: Channelized STM1-to-T1 Channel Mapping ..................................483
Configuring Channelized T3 Interfaces
Table 44: Ranges for Channelized DS3-to-DS0 Configuration ......................493
Configuring Channelized T1 Interfaces
Table 45: Ranges for Channelized T1 IQ Configuration ...............................508
Configuring Channelized E1 Interfaces
Table 46: Ranges for Channelized E1 Configuration ....................................514
Configuring Circuit Emulation PICs
Configuring ATM Support on Circuit Emulation PICs
Table 47: IMA Frame Synchronization Link State Transition Variables ........547
Table 48: IMA Group Alarms with IMA Standard Requirement Numbers .....547
Table 49: IMA Group Defects with IMA Standard Requirement Numbers ....548
Table 50: IMA Link Alarms with IMA Standard Requirement Numbers ........548
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