Juniper JUNOS 10.1 - CONFIGURATION GUIDE 1-2010 Configuration Manual page 23

Chapter 20
Chapter 21
Chapter 22
Configuring Link PIC Failover on Channelized OC12/STM4 IQ and IQE
Interfaces ..............................................................................................456
Example: Configuring a Channelized OC12 IQ Interface as an Unpartitioned
Clear Channel .......................................................................................457
Example: Configuring Channelized OC12 Interfaces with Partitioned
Channels ...............................................................................................460
Configuring Channelized OC3 IQ and IQE Interfaces
Channelized OC3 IQ and IQE Overview ......................................................463
Partitions, OC Slices, Interface Types, and Time Slots .................................464
Configuring a Clear Channel on Channelized OC3 IQ and IQE PICs .............465
Configuring T3 Interfaces on IQ and IQE Interfaces ....................................465
Example: Configuring T3 Interfaces ......................................................466
Configuring T1 and NxDS0 Interfaces .........................................................466
Example: Configuring T1 and NxDS0 Interfaces ...................................468
Example: Setting Remote Loopback and Running BERT Tests on NxDS0
Interfaces .......................................................................................469
Configuring Fractional T1 IQ Interfaces .......................................................470
Example: Configuring Fractional T1 IQ Interfaces .................................470
Configuring Link PIC Failover on Channelized OC3 IQ and IQE
Interfaces ..............................................................................................470
Configuring Channelized STM1 Interfaces
Channelized STM1 Interfaces Overview ......................................................473
Configuring Channelized STM1 IQ and IQE Interfaces .................................473
Configuring an STM1 IQ or STM1 IQE Interface ....................................473
Configuring E1 IQ and IQE Interfaces ...................................................474
Example: Configuring E1 IQ and IQE Interfaces .............................474
Configuring Fractional E1 IQ and IQE Interfaces ...................................475
Example: Configuring Fractional E1 Interfaces ...............................476
Configuring an NxDS0 IQ Interface .......................................................476
Example: Configuring an NxDS0 IQ Interface .................................477
Example: Configuring Channelized STM1 IQ and IQE Interfaces ...........477
Configuring Channelized STM1 Interfaces ...................................................479
Configuring Channelized STM1 Interface Properties .............................479
Configuring Virtual Tributary Mapping of Channelized STM1
Interfaces .......................................................................................480
Configuring Link PIC Failover on Channelized STM1 Interfaces ...................486
Example: Configuring Channelized STM1 Interfaces ...................................487
Configuring Channelized T3 Interfaces
Configuring Channelized T3 IQ Interfaces ...................................................489
Configuring T3 IQ Interfaces .................................................................489
Configuring T1 IQ Interfaces .................................................................490
Example: Configuring T1 IQ and IQE Interfaces .............................490
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Table of Contents