ST STM32L4+ Series Reference Manual page 2291

RM0432
Date
18-Dec-2019
Table 441. Document revision history (continued)
Revision
Updated
to STM32L4P5xx and STM32L4Q5xx
– Section 33.1:
– Section 33.5: RNG processing time
– Section 33.3.3: Random number
– Table 223: RNG configurations
– Section 33.6.3: Data collection
– Section 33.7.3: RNG data register
AES hardware accelerator (AES) section
Updated:
– Section 34.2: AES main features
features.
– Section 34.4.5: AES decryption round key preparation
and initial paragraph modified
– notion of "round key" introduced in the document
– Table 225: AES internal input/output signals
aes_itamp_out row.
– Initialization of AES
– Table 232: Processing latency for ECB, CBC and CTR
footnote
– Figure 268: CTR
6
Public key accelerator (PKA) section
(continued)
– Updated:
– Section 36: Public key accelerator (PKA) applied to
STM32L4P5xx and STM32L4Q5xx
– Table 265: Modular exponentiation computation
– Table 266: ECC scalar multiplication computation
– Table 267: ECDSA signature average computation
– Table 268: ECDSA verification average computation
– Table 269: Montgomery parameters average computation times
Added Section 36.3.3: PKA reset and
Advanced-control timers (TIM1/TIM8) section
Updated:
– Section 37.3.29: Debug
– Section 37.4.24: TIM8 option register 1 (TIM8_OR1)
ETR_DAC2_RMP[1:0] description.
– Section 37.4.28: TIM1 option register 2 (TIM1_OR2)
ETRSEL[2:0] description.
– Section 37.4.30: TIM8 option register 2 (TIM8_OR2)
ETRSEL[2:0] description.
– Section 37.4.32: TIM1 register map
register
– Figure 306: TIM8 ETR input
RM0432 Rev 6
Changes
Section 33: True random number generator (RNG) applied
Introduction.
and AES key registers
encryption.
mode.
map.
circuitry.
Revision history
only.
removing the table.
generation.
(RNG_DR).
with Integrated key scheduler
section title
removing
removing notes.
removing
only.
times.
times.
times.
times.
clocks..
bit[1:0]
bit[16:14]
bit[16:14]
and Section 37.4.33: TIM8
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