ST STM32L4+ Series Reference Manual page 2283

RM0432
Date
05-Feb-2018
Table 441. Document revision history (continued)
Revision
Updated:
– Section 1.2: List of abbreviations for registers
– Section 2.4: Embedded SRAM
– Section 2.6.1: Boot configuration
– Section 3.3.2: Error code correction (ECC)
– Table 20: Flash interface - register map and reset values
– Section 5.1: Power supplies
– Figure 9: STM32L4P5xx/Q5xx, STM32L4S5xx/R5xx and
STM32L4S7xx/L4R7xx power supply overview
– Figure 10: STM32L4S9xx/L4R9xx power supply overview
– Section 5.3.9: Standby mode
– Section 5.3.10: Shutdown mode
– Section 5.3.9: Standby mode
– Section 6.2: Clocks
– Section 6.2.11: Clock security system on LSE
– Section 6.4.4: PLL configuration register (RCC_PLLCFGR)
– Section 8.3.8: External interrupt/wakeup lines
– Section 8.4.5: GPIO port input data register (GPIOx_IDR) (x = A to
I)
– Table 43: STM32L4Rxxx and STM32L4Sxxx peripherals
interconnect matrix
– Section 10.3.3: From ADC to timer (TIM1/TIM8)
– Section 10.3.5: From timer
2
(TIM1/TIM3/TIM4/TIM6/TIM7/TIM8/TIM16/LPTIM1/LPTIM2) and
(continued)
EXTI to DFSDM1
– Section Table 54.: DMAMUX: assignment of multiplexer inputs to
resources (STM32L4Rxxx and STM32L4Sxxx devices)
– Section 12.4.4: DMAMUX request line multiplexer
– Section 12.4.5: DMAMUX request generator
– Section 16.6.1: DMAMUX1 request line multiplexer channel x
configuration register (DMAMUX1_CxCR)
– Section 19.6.7: DMAMUX1 request generator channel x
configuration register (DMAMUX1_RGxCR)
– Figure 40: Virtual buffer and physical buffer memory map
– Dummy-cycles phase
command mode
– Section 19.3.1: OCTOSPI indirect mode
– Section 19.3.2: OCTOSPI status flag polling mode
– Section 19.3.3: OCTOSPI memory-mapped mode
– Section 19.4.1: OCTOSPI system configuration
– Section 19.4.2: OCTOSPI device configuration
– Memory-mapped mode configuration
OCTOSPI regular-command mode configuration
– Section 19.4.6: OCTOSPI busy bit and abort functionality
– Section 19.6.1: OCTOSPI control register (OCTOSPI_CR)
– Section 19.6.2: OCTOSPI device configuration register 1
(OCTOSPI_DCR1)
RM0432 Rev 6
Changes
on Section 19.2.1: OCTOSPI regular-
on Section 19.4.3:
Revision history
2283/2301
2292