ST STM32L4+ Series Reference Manual page 2286

Revision history
Date
05-Feb-2018
2286/2301
Table 441. Document revision history (continued)
Revision
Updated:
– Figure 617: OTG_FS full-speed block diagram
– Section 56.7: OTG_FS as a USB host
– Section 56.9: OTG_FS low-power modes
– Figure 625: Interrupt hierarchy
– Section 56.15.1: OTG control and status register
(OTG_GOTGCTL)
– Section 56.15.4: OTG USB configuration register
(OTG_GUSBCFG)
– Section 56.15.7: OTG interrupt mask register (OTG_GINTMSK)
– Section 56.15.9: OTG receive status debug read [alternate]
(OTG_GRXSTSR)
– Section 56.15.21: OTG device IN endpoint transmit FIFO x size
register (OTG_DIEPTXFx)
– Section 56.15.24: OTG host frame interval register (OTG_HFIR)
– Section 56.15.30: OTG host channel x characteristics register
(OTG_HCCHARx)
2
– Section 56.15.31: OTG host channel x interrupt register
(continued)
(OTG_HCINTx)
– Section 56.15.32: OTG host channel x interrupt mask register
(OTG_HCINTMSKx)
– Section 56.15.35: OTG device configuration register
(OTG_DCFG)
– Section 56.15.38: OTG device IN endpoint common interrupt
mask register (OTG_DIEPMSK)
– Section 56.15.38: OTG device IN endpoint common interrupt
mask register (OTG_DIEPMSK)
– Section 56.15.47: OTG device IN endpoint x interrupt register
(OTG_DIEPINTx)
– Section 56.15.52: OTG device OUT endpoint x interrupt register
(OTG_DOEPINTx)
– Section 56.16.4: Host programming model
– Figure 638: A-device SRP
– Figure 639: B-device SRP
– Table 438: Flexible TRACE pin assignment
RM0432 Rev 6
Changes
RM0432