ST STM32F423 Reference Manual page 442

Digital filter for sigma delta modulators (DFSDM)
Table 97. DFSDM register map and reset values (continued)
Register
Offset
name
DFSDM_
CH3AWSCDR
0x68
reset value
DFSDM_
CH3WDATR
0x6C
reset value
DFSDM_
CH3DATINR
0x70
reset value 0
0x74 -
Reserved
0x7C
DFSDM_
CH4CFGR1
0x80
reset value
DFSDM_
CH4CFGR2
0x84
reset value 0
DFSDM_
CH4AWSCDR
0x88
reset value
DFSDM_
CH4WDATR
0x8C
reset value
DFSDM_
CH4DATINR
0x90
reset value 0
0x94 -
Reserved
0x9C
DFSDM_
CH5CFGR1
0xA0
reset value
DFSDM_
CH5CFGR2
0xA4
reset value 0
DFSDM_
CH5AWSCDR
0xA8
reset value
442/1324
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
RM0430 Rev 8
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
RM0430
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0
SCDT[7:0]
0 0 0 0 0