Aes Implementation; Aes Functional Description; Aes Block Diagram; Aes Internal Signals - ST STM32F423 Reference Manual

AES hardware accelerator (AES)
24.3

AES implementation

The device has a single instance of AES peripheral.
24.4

AES functional description

24.4.1

AES block diagram

Figure 224
24.4.2

AES internal signals

Table 124
Signal name
aes_hclk
aes_it
aes_in_dma
aes_out_dma
692/1324
shows the block diagram of AES.

Figure 224. AES block diagram

describes the user relevant internal signals interfacing the AES peripheral.

Table 124. AES internal input/output signals

Signal type
digital input
digital output
digital
input/output
digital
input/output
AHB bus clock
AES interrupt request
Input DMA single request/acknowledge
Output DMA single request/acknowledge
RM0430 Rev 8
Description
RM0430