Tim6/7 Prescaler (Timx_Psc); Tim6/7 Auto-Reload Register (Timx_Arr) - ST STM32F423 Reference Manual

RM0430
20.4.7

TIM6/7 prescaler (TIMx_PSC)

Address offset: 0x28
Reset value: 0x0000
15 14 13
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Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency (CK_CNT) is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event
(including when the counter is cleared through UG bit of TIMx_EGR register or through
trigger controller when configured in "reset mode").
20.4.8

TIM6/7 auto-reload register (TIMx_ARR)

Address offset: 0x2C
Reset value: 0xFFFF
15 14 13
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Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded into the actual auto-reload register.
Refer to
behavior.
The counter is blocked while the auto-reload value is null.
12 11 10 9
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12 11 10 9
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Section 20.3.1: Time-base unit on page 643
8 7 6
PSC[15:0]
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8 7 6
ARR[15:0]
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RM0430 Rev 8
Basic timers (TIM6/7)
5 4 3 2
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/ (PSC[15:0] + 1).
CK_PSC
5 4 3 2
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for more details about ARR update and
1 0
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1 0
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