ST STM32F423 Reference Manual page 900

Universal synchronous receiver transmitter (USART) /universal asynchronous receiver transmit-
Table 160. Error calculation for programmed baud rates at f
Baud rate
S.No Desired
9 460.8 KBps
10 921.6 KBps
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 161. Error calculation for programmed baud rates at f
Baud rate
S.No Desired
1 1.2 KBps
2 2.4 KBps
3 9.6 KBps
4 19.2 KBps
5 38.4 KBps
6 57.6 KBps
7 115.2 KBps
8 230.4 KBps
9 460.8 KBps
10 921.6 KBps
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
900/1324
oversampling by 8
Oversampling by 8 (OVER8 = 1)
f = 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
470.588 KBps 2.125
888.889 KBps 1.125
oversampling by 16
Oversampling by 16 (OVER8 = 0)
= 16 MHz
f PCLK
Value
programmed
Actual
in the baud
rate register
1.2 KBps 833.3125
2.4 KBps 416.6875
9.598 KBps 104.1875
19.208 KBps 52.0625
38.369 KBps 26.0625
57.554 KBps 17.375
115.108 KBps 8.6875
231.884 KBps 4.3125
457.143 KBps 2.1875
941.176 KBps 1.0625
(1)
(continued)
% Error =
(Calculated -
Desired)
B.rate /
Desired
B.rate
2.12
3.55
PCLK
(1)
% Error =
(Calculated -
Desired) B.rate /
Desired B.rate
0
0
0.02
0.04
0.08
0.08
0.08
0.64
0.79
2.12
RM0430 Rev 8
= 8 MHz or f
PCLK PCLK
f = 12 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
461.538 KBps 3.25
923.077 KBps 1.625
= 16 MHz or f
PCLK
= 24 MHz
f PCLK
Value
programmed
Actual
in the baud
rate register
1.2 1250
2.4 625
9.6 156.25
19.2 78.125
38.4 39.0625
57.554 26.0625
115.385 13
230.769 6.5
461.538 3.25
923.077 1.625
= 12 MHz,
% Error
0.16
0.16
= 24 MHz,
% Error
0
0
0
0
0
0.08
0.16
0.16
0.16
0.16