Fmpi2C Interrupts; Fmpi2C Registers; Control Register 1 (Fmpi2C_Cr1); Table 151. Fmpi2C Interrupt Requests - ST STM32F423 Reference Manual

RM0430
26.6

FMPI2C interrupts

The table below gives the list of FMPI2C interrupt requests.
Interrupt
Interrupt event
acronym
Receive buffer not
empty
Transmit buffer
interrupt status
Stop detection
interrupt flag
Transfer Complete
I2C_EV
Reload
Transfer complete
Address matched
NACK reception
Bus error
Arbitration loss
Overrun/Underrun
I2C_ER
PEC error
Timeout/t
LOW
SMBus Alert
Depending on the product implementation, all these interrupts events can either share the
same interrupt vector (FMPI2C global interrupt), or be grouped into 2 interrupt vectors
(FMPI2C event interrupt and FMPI2C error interrupt). Refer to
STM32F413/423
26.7

FMPI2C registers

Refer to
The peripheral registers are accessed by words (32-bit).
26.7.1

Control register 1 (FMPI2C_CR1)

Address offset: 0x00
Reset value: 0x0000 0000
Fast-mode Plus Inter-integrated circuit (FMPI2C) interface

Table 151. FMPI2C Interrupt requests

Event flag
RXNE
TXIS
STOPF
TCR
TC
ADDR
NACKF
BERR
ARLO
OVR
PECERR
error TIMEOUT
ALERT
for details.
Section 1.2 on page 52
Enable Interrupt clear
control bit method
RXIE FMPI2C_RXDR
register
TXIE FMPI2C_TXDR
register
STOPIE Write STOPCF=1
FMPI2C_CR2 with
NBYTES[7:0] ≠ 0
TCIE
Write START=1 or
STOP=1
ADDRIE Write ADDRCF=1
NACKIE Write NACKCF=1
Write BERRCF=1
Write ARLOCF=1
Write OVRCF=1
ERRIE
PECERRCF=1
TIMEOUTCF=1
Write ALERTCF=1
for a list of abbreviations used in register descriptions.
RM0430 Rev 8
Exit the
Sleep mode
Read
Write
Write
Yes
Write
Yes
Write
Table 40: Vector table for
Exit the
Stop mode
No
No
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