ST STM32F423 Reference Manual page 701

RM0430
Data append
This section describes different ways of appending data for processing, where the size of
data to process is not a multiple of 128 bits.
For ECB, CBC and GCM encryption mode, refer to
and data
complex than in the sequence described in this section.
Data append through polling
This method uses flag polling to control the data append.
For all other cases, the data is appended through the following sequence:
1. Enable the AES peripheral by setting the EN bit of the AES_CR register.
2. Repeat the following sub-sequence until the payload is entirely processed:
a)
b)
c)
d)
3. Discard the data that is not part of the payload, then disable the AES peripheral by
clearing the EN bit of the AES_CR register.
Note: Up to three wait cycles are automatically inserted between two consecutive writes to the
AES_DINR register, to allow sending the key to the AES processor.
Data append using interrupt
The method uses interrupt from the AES peripheral to control the data append, through the
following sequence:
1. Enable interrupts from AES by setting the CCFIE bit of the AES_CR register.
2. Enable the AES peripheral by setting the EN bit of the AES_CR register.
3. Write first four input data words into the AES_DINR register.
4. Handle the data in the AES interrupt service routine, upon interrupt:
a)
b)
c)
d)
e)
Note: AES is tolerant of delays between consecutive read or write operations, which allows, for
example, an interrupt from another peripheral to be served between two AES computations.
padding. The second-last and the last block management in these cases is more
Write four input data words into the AES_DINR register.
Wait until the status flag CCF is set in the AES_SR, then read the four data words
from the AES_DOUTR register.
Clear the CCF flag, by setting the CCFC bit of the AES_CR register.
If the data block just processed is the second-last block of the message and the
significant data in the last block to process is inferior to 128 bits, pad the
remainder of the last block with zeros
Read four output data words from the AES_DOUTR register.
Clear the CCF flag and thus the pending interrupt, by setting the CCFC bit of the
AES_CR register
If the data block just processed is the second-last block of an message and the
significant data in the last block to process is inferior to 128 bits, pad the
remainder of the last block with zeros. Then proceed with point 4e).
If the data block just processed is the last block of the message, discard the data
that is not part of the payload, then disable the AES peripheral by clearing the EN
bit of the AES_CR register and quit the interrupt service routine.
Write next four input data words into the AES_DINR register and quit the interrupt
service routine.
Section 24.4.6: AES ciphertext stealing
RM0430 Rev 8
AES hardware accelerator (AES)
701/1324
743