Table 25. Port Bit Configuration Table; Figure 17. Basic Structure Of A Five-Volt Tolerant I/O Port Bit - ST STM32F423 Reference Manual

RM0430
Figure 17
port bit configurations.
1. V
DD_FT
MODER(i)
[1:0]
01
show the basic structure of a 5 V tolerant I/O port bit.

Figure 17. Basic structure of a five-volt tolerant I/O port bit

is a potential specific to five-volt tolerant I/Os and different from V

Table 25. Port bit configuration table

OSPEEDR(i)
OTYPER(i)
0
0
0
0
SPEED
[B:A]
1
1
1
1
PUPDR(i)
[B:A] [1:0]
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
RM0430 Rev 8
General-purpose I/Os (GPIO)
Table 25 gives the possible
.
DD
(1)
I/O configuration
GP output PP
GP output PP + PU
GP output PP + PD
Reserved
GP output OD
GP output OD + PU
GP output OD + PD
Reserved (GP output OD)
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