Flexible static memory controller (FSMC)
Mode 1 - SRAM/PSRAM (CRAM)
The next figures show the read and write transactions for the supported modes followed by
the required configuration of FSMC_BCRx, and FSMC_BTRx/FSMC_BWTRx registers.
274/1324
Figure 33. Mode1 read access waveforms
Figure 34. Mode1 write access waveforms
RM0430 Rev 8
RM0430
Need help?
Do you have a question about the STM32F423 and is the answer not in the manual?