Tim10/11/13/14 Capture/Compare Mode Register 1; (Timx_Ccmr1) - ST STM32F423 Reference Manual

Advanced arm-based 32-bit mcus
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General-purpose timers (TIM9 to TIM14)
19.5.5

TIM10/11/13/14 capture/compare mode register 1

(TIMx_CCMR1)

Address offset: 0x18
Reset value: 0x0000
The channels can be used in input (capture mode) or in output (compare mode). The
direction of a channel is defined by configuring the corresponding CCxS bits. All the other
bits of this register have a different function in input and in output mode. For a given bit,
OCxx describes its function when the channel is configured in output, ICxx describes its
function when the channel is configured in input. So you must take care that the same bit
can have a different meaning for the input stage and for the output stage.
15
14
13
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
634/1324
12
11
10
9
Res.
Res.
Res.
Res.
Res.
Res.
8
7
6
Res.
Res.
OC1M[2:0]
Res.
IC1F[3:0]
rw
rw
RM0430 Rev 8
5
4
3
2
OC1PE OC1FE
IC1PSC[1:0]
rw
rw
rw
rw
RM0430
1
0
CC1S[1:0]
rw
rw

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