Figure 257. Setup And Hold Timings - ST STM32F423 Reference Manual

RM0430 Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
FMPI2C timings
The timings must be configured in order to guarantee a correct data hold and setup time,
used in master and slave modes. This is done by programming the PRESC[3:0],
SCLDEL[3:0] and SDADEL[3:0] bits in the FMPI2C_TIMINGR register.
The STM32CubeMX tool calculates and provides the I2C_TIMINGR content in the I2C
configuration window

Figure 257. Setup and hold timings

RM0430 Rev 8 787/1324
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