ST STM32F423 Reference Manual page 447

RM0430
Table 97. DFSDM register map and reset values (continued)
Register
Offset
name
DFSDM_
FLT2JCHGR
0x210
reset value
DFSDM_
FLT2FCR
0x214
reset value 0
DFSDM_
FLT2JDATAR
0x218
reset value 0
DFSDM_
FLT2RDATAR
0x21C
reset value 0
DFSDM_
FLT2AWHTR
0x220
reset value 0
DFSDM_
FLT2AWLTR
0x224
reset value 0
DFSDM_
FLT2AWSR
0x228
reset value
DFSDM_
FLT2AWCFR
0x22C
reset value
DFSDM_
FLT2EXMAX
0x230
reset value 1
DFSDM_
FLT2EXMIN
0x234
reset value 0
DFSDM_
FLT2CNVTIMR
0x238
reset value 0
0x23C -
Reserved
0x27C
DFSDM_
FLT3CR1
0x280
reset value
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0
RCH[2:0]
0 0 0 0 0
Digital filter for sigma delta modulators (DFSDM)
FOSR[9:0]
0 0 0 0 0 0
JDATA[23:0]
0 0 0 0 0 0 0 0
RDATA[23:0]
0 0 0 0 0 0 0 0
AWHT[23:0]
0 0 0 0 0 0 0 0
AWLT[23:0]
0 0 0 0 0 0 0 0
0 0
0 0
EXMAX[23:0]
0 0 0 0 0 0 0 0
EXMIN[23:0]
1 1 1 1 1 1 1 1
CNVCNT[27:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
RM0430 Rev 8
0 0
0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
AWHTF[7:0]
0 0 0 0 0 0 0 0
CLRAWHTF[7:0] CLRAWLTF[7:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0
1 1 1 1 1 1
0 0 0 0 0 0 0 0
0 0 0 0
JCHG[7:0]
0 0 0 0 0 1
IOSR[7:0]
0 0 0 0 0 0
0 0 0
RDATA
CH[2:0]
0 0 0 0
BKAWH[3:0]
0 0 0 0
BKAWL[3:0]
0 0 0 0
AWLTF[7:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0
0 0 0
0 0
0 0 0 0 0
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