Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
Access: No wait states, except if a write access occurs while a write access to this register is
ongoing. In this case, wait states are inserted in the second write access until the previous
one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x
FMPI2CCLK.
31
30
29
Res.
Res.
Res.
15
14
13
RXDMA
TXDMA
Res.
EN
EN
rw
rw
Bits 31:24 Reserved, must be kept at reset value.
Bit 23 PECEN: PEC enable
Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to '0'.
Bit 22 ALERTEN: SMBus alert enable
Device mode (SMBHEN=0):
Host mode (SMBHEN=1):
Note: When ALERTEN=0, the SMBA pin can be used as a standard GPIO.
Bit 21 SMBDEN: SMBus Device Default address enable
Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to '0'.
Bit 20 SMBHEN: SMBus Host address enable
Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to '0'.
Bit 19 GCEN: General call enable
Bit 18 Reserved, must be kept at reset value.
832/1324
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
ANF
DNF
OFF
rw
rw
rw
rw
0: PEC calculation disabled
1: PEC calculation enabled
Refer to
Section 26.3: FMPI2C
0: Releases SMBA pin high and Alert Response Address Header disabled: 0001100x
followed by NACK.
1: Drives SMBA pin low and Alert Response Address Header enables: 0001100x followed
by ACK.
0: SMBus Alert pin (SMBA) not supported.
1: SMBus Alert pin (SMBA) supported.
If the SMBus feature is not supported, this bit is reserved and forced by hardware to '0'.
Refer to
Section 26.3: FMPI2C
0: Device default address disabled. Address 0b1100001x is NACKed.
1: Device default address enabled. Address 0b1100001x is ACKed.
Refer to
Section 26.3: FMPI2C
0: Host address disabled. Address 0b0001000x is NACKed.
1: Host address enabled. Address 0b0001000x is ACKed.
Refer to
Section 26.3: FMPI2C
0: General call disabled. Address 0b00000000 is NACKed.
1: General call enabled. Address 0b00000000 is ACKed.
24
23
22
ALERT
SMBD
Res.
PECEN
EN
rw
rw
8
7
6
STOP
ERRIE
TCIE
rw
rw
rw
implementation.
implementation.
implementation.
implementation.
RM0430 Rev 8
21
20
19
18
SMBH
GCEN
Res.
EN
EN
rw
rw
rw
5
4
3
2
NACK
ADDR
RXIE
IE
IE
IE
rw
rw
rw
rw
RM0430
17
16
NOSTR
SBC
ETCH
rw
rw
1
0
TXIE
PE
rw
rw
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