ST STM32F423 Reference Manual page 88

Advanced arm-based 32-bit mcus
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Embedded Flash memory interface
Bits 3:2 BOR_LEV: BOR reset Level
These bits contain the supply level threshold that activates/releases the reset. They can be
written to program a new BOR level. By default, BOR is off. When the supply voltage (V
drops below the selected BOR level, a device reset is generated.
00: BOR Level 3 (VBOR3), brownout threshold level 3
01: BOR Level 2 (VBOR2), brownout threshold level 2
10: BOR Level 1 (VBOR1), brownout threshold level 1
11: BOR off, POR/PDR reset threshold level is applied
Note: For full details about BOR characteristics, refer to the "Electrical characteristics" section
Bit 1 OPTSTRT: Option start
This bit triggers a user option operation when set. It is set only by software and cleared when
the BSY bit is cleared.
Bit 0 OPTLOCK: Option lock
Write to 1 only. When this bit is set, it indicates that the FLASH_OPTCR register is locked.
This bit is cleared by hardware after detecting the unlock sequence.
In the event of an unsuccessful unlock operation, this bit remains set until the next reset.
88/1324
in the device datasheet.
RM0430 Rev 8
RM0430
)
DD

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