Aes Hardware Accelerator (Aes); Introduction; Aes Main Features - ST STM32F423 Reference Manual

RM0430
24

AES hardware accelerator (AES)

24.1

Introduction

The AES hardware accelerator (AES) encrypts or decrypts data, using an algorithm and
implementation fully compliant with the advanced encryption standard (AES) defined in
Federal information processing standards (FIPS) publication 197.
Multiple chaining modes are supported (ECB, CBC, CTR, GCM, GMAC, CCM), for key
sizes of 128 or 256 bits.
The AES accelerator is a 32-bit AHB peripheral. It supports DMA single transfers for
incoming and outgoing data (two DMA channels required).
The AES peripheral provides hardware acceleration to AES cryptographic algorithms
packaged in STM32 cryptographic library.
AES is an AMBA AHB slave peripheral, accessible through 32-bit word single accesses only
(otherwise an AHB bus error is generated and write accesses are ignored).
24.2

AES main features

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Compliance with NIST "Advanced encryption standard (AES), FIPS publication 197"
from November 2001
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128-bit data block processing
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Support for cipher key lengths of 128-bit and 256-bit
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Encryption and decryption with multiple chaining modes:
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51 or 75 clock cycle latency in ECB mode for processing one 128-bit block of data with,
respectively, 128-bit or 256-bit key
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Integrated key scheduler with its key derivation stage (ECB or CBC decryption only)
•
AMBA AHB slave peripheral, accessible through 32-bit word single accesses only
•
256-bit register for storing the cryptographic key (eight 32-bit registers)
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128-bit register for storing initialization vector (four 32-bit registers)
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32-bit buffer for data input and output
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Automatic data flow control with support of single-transfer direct memory access (DMA)
using two channels (one for incoming data, one for processed data)
•
Data-swapping logic to support 1-, 8-, 16- or 32-bit data
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Possibility for software to suspend a message if AES needs to process another
message with a higher priority, then resume the original message
Electronic codebook (ECB) mode
Cipher block chaining (CBC) mode
Counter (CTR) mode
Galois counter mode (GCM)
Galois message authentication code (GMAC) mode
Counter with CBC-MAC (CCM) mode
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AES hardware accelerator (AES)
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