Aes Data Output Register (Aes_Doutr); Aes Key Register 0 (Aes_Keyr0) - ST STM32F423 Reference Manual

AES hardware accelerator (AES)
Bits 31:0 DIN[x+31:x]: One of four 32-bit words of a 128-bit input data block being written into the peripheral
This bitfield feeds a 32-bit input buffer. A 4-fold sequential write to this bitfield during the input phase
virtually writes a complete 128-bit block of input data to the AES peripheral. Upon each write, the
data from the input buffer are handled by the data swap block according to the DATATYPE[1:0]
bitfield, then written into the AES core 128-bit input buffer.
The substitution for "x", from the first to the fourth write operation, is: 96, 64, 32, and 0. In other
words, data from the first to the fourth write operation are: DIN[127:96], DIN[95:64], DIN[63:32], and
DIN[31:0].
The data signification of the input data block depends on the AES operating mode:
- Mode 1 (encryption): plaintext
- Mode 2 (key derivation): the bitfield is not used (AES_KEYRx registers used for input)
- Mode 3 (decryption) and Mode 4 (key derivation then single decryption): ciphertext
The data swap operation is described in
page 724.
24.7.4

AES data output register (AES_DOUTR)

Address offset: 0x0C
Reset value: 0x0000 0000
Only 32-bit access type is supported.
31 30 29
r r r
15 14 13
r r r
Bits 31:0 DOUT[x+31:x]: One of four 32-bit words of a 128-bit output data block being read from the peripheral
This bitfield fetches a 32-bit output buffer. A 4-fold sequential read of this bitfield, upon the
computation completion (CCF set), virtually reads a complete 128-bit block of output data from the
AES peripheral. Before reaching the output buffer, the data produced by the AES core are handled
by the data swap block according to the DATATYPE[1:0] bitfield.
The substitution for DOUT[x+31:x], from the first to the fourth read operation, is: 96, 64, 32, and 0. In
other words, data from the first to the fourth read operation are: DOUT[127:96], DOUT[95:64],
DOUT[63:32], and DOUT[31:0].
The data signification of the output data block depends on the AES operating mode:
- Mode 1 (encryption): ciphertext
- Mode 2 (key derivation): the bitfield is not used (AES_KEYRx registers used for output).
- Mode 3 (decryption) and Mode 4 (key derivation then single decryption): plaintext
The data swap operation is described in
page 724.
24.7.5

AES key register 0 (AES_KEYR0)

Address offset: 0x10
Reset value: 0x0000 0000
736/1324
28 27 26 25
r r r r
12 11 10 9
r r r r
Section 24.4.13: .AES data registers and data swapping on
24 23 22
DOUT[x+31:x+16]
r r r
8 7 6
DOUT[x+15:0]
r r r
Section 24.4.13: .AES data registers and data swapping on
RM0430 Rev 8
21 20 19 18
r r r r
5 4 3 2
r r r r
RM0430
17 16
r r
1 0
r r