I2C Register Map; Table 156. I2C Register Map And Reset Values - ST STM32F423 Reference Manual

Advanced arm-based 32-bit mcus
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Inter-integrated circuit (I
2
27.6.11
I
C register map
The table below provides the I
Offset
Register
I2C_CR1
0x00
Reset value
I2C_CR2
0x04
Reset value
I2C_OAR1
0x08
Reset value
I2C_OAR2
0x0C
Reset value
I2C_DR
0x10
Reset value
I2C_SR1
0x14
Reset value
I2C_SR2
0x18
Reset value
I2C_CCR
0x1C
Reset value
I2C_TRISE
0x20
Reset value
I2C_FLTR
0x24
Reset value
Refer to
882/1324
2
C) interface
2
Table 156. I
C register map and reset values
Section 2.2.2
for the register boundary addresses.
2
C register map and reset values.
0
0
0
0
0
RM0430 Rev 8
0
0
0
0
0
0
0
0
0
0
0
0
0
ADD[
9:8]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PEC[7:0]
0
0
0
0
0
0
0
0
0
CCR[11:0]
0
0
0
0
0
0
0
RM0430
0
0
0
0
0
FREQ[5:0]
0
0
0
0
0
0
ADD[7:1]
0
0
0
0
0
0
ADD2[7:1]
0
0
0
0
0
0
DR[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRISE[5:0]
0
0
0
0
1
0
DNF[3:0]
0
0
0
0
0

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