Rng Initialization; Rng Operation - ST STM32F423 Reference Manual

True random number generator (RNG)
Health checks
This component ensures that the entire entropy source (with its noise source) starts then
operates as expected, obtaining assurance that failures are caught quickly and with a high
probability and reliability.
The RNG implements the following health check features:
1. Behavior tests, applied to the entropy source at run-time
–
a)
b)
2. Vendor specific continuous test
–
The CECS and SECS status bits in the RNG_SR register indicate when an error condition is
detected, as detailed in
Note: An interrupt can be generated when an error is detected.
16.3.4

RNG initialization

When a hardware reset occurs the following chain of events occurs:
1. The analog noise source is enabled, and logic starts sampling the analog output after
four RNG clock cycles, filling LFSR shift register and associated 16-bit post-processing
shift register.
2. The output buffer is refilled automatically according to the RNG usage.
The associated initialization time can be found in
16.3.5

RNG operation

Normal operations
To run the RNG using interrupts the following steps are recommended:
1. Enable the interrupts by setting the IE bit in the RNG_CR register. At the same time
enable the RNG by setting the bit RNGEN=1.
2. An interrupt is now generated when a random number is ready or when an error
occurs. Therefore at each interrupt, check that:
–
–
–
454/1324
Repetition count test, flagging an error when:
One of the noise source has provided more than 64 consecutive bits at a constant
value ("0" or "1")
One of the noise sources has delivered more than 32 consecutive occurrence of
two bits patterns ("01" or "10")
Real-time "too slow" sampling clock detector, flagging an error when one RNG
clock cycle is smaller than AHB clock cycle divided by 16.
Section 16.3.7: Error
No error occurred. The SEIS and CEIS bits should be set to '0' in the RNG_SR
register.
A random number is ready. The DRDY bit must be set to '1' in the RNG_SR
register.
If above two conditions are true the content of the RNG_DR register can be read.
management.
Section 16.6: RNG processing
RM0430 Rev 8
RM0430
time.