ST STM32F423 Reference Manual page 247

RM0430
Offset Register name
DMA_S3FCR
0x006C
Reset value
DMA_S4CR
0x0070
Reset value
DMA_S4NDTR
0x0074
Reset value
DMA_S4PAR
0x0078
Reset value 0
DMA_S4M0AR
0x007C
Reset value 0
DMA_S4M1AR
0x0080
Reset value 0
DMA_S4FCR
0x0084
Reset value
DMA_S5CR
0x0088
Reset value
DMA_S5NDTR
0x008C
Reset value
DMA_S5PAR
0x0090
Reset value 0
DMA_S5M0AR
0x0094
Reset value 0
DMA_S5M1AR
0x0098
Reset value 0
DMA_S5FCR
0x009C
Reset value
DMA_S6CR
0x00A0
Reset value
Table 39. DMA register map and reset values (continued)
0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0
Direct memory access controller (DMA)
0 0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
RM0430 Rev 8
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
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