Figure 21.19 Ssu Timing (Slave, Cphs = 1) - Renesas H8SX/1500 Series Hardware Manual

32-bit cisc microcomputer
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SCS (input)
SSCK (input)
CPOS = 1
SSCK (input)
CPOS = 0
SSO (input)
SSI (output)
t
SA

Figure 21.19 SSU Timing (Slave, CPHS = 1)

SCS (input)
t
LEAD
SSCK (input)
CPOS = 1
SSCK (input)
CPOS = 0
SSO (input)
SSI (output)
t
SA
Figure 21.20 SSU Timing (Slave, CPHS = 0)
t
t
t
LEAD
HI
FALL
t
LO
t
HI
t
SUcyc
t
LO
t
t
SU
H
t
t
OH
OD
t
t
HI
FALL
t
LO
t
HI
t
SUcyc
t
LO
t
t
SU
H
t
t
OH
OD
Section 21 Electrical Characteristics
t
RISE
t
t
RISE
LAG
Rev. 3.00 Mar. 14, 2006 Page 775 of 804
t
t
LAG
TD
t
REL
t
TD
t
REL
REJ09B0104-0300

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