Section 14 Synchronous Serial Communication Unit (Ssu); Features - Renesas H8SX/1500 Series Hardware Manual

Section 14 Synchronous Serial Communication Unit (SSU)

This LSI has three independent synchronous serial communication unit (SSU) channels. The SSU
has master mode in which this LSI outputs clocks as a master device for synchronous serial
communication and slave mode in which clocks are input from an external device for synchronous
serial communication. Synchronous serial communication can be performed with devices having
different clock polarity and clock phase. Figure 14.1 is a block diagram of the SSU.
14.1

Features

• Choice of SSU mode and clock synchronous mode
• Choice of master mode and slave mode
• Choice of standard mode and bidirectional mode
• Synchronous serial communication with devices with different clock polarity and clock phase
• Choice of 8/16/32-bit width of transmit/receive data
• Full-duplex communication capability
The shift register is incorporated, enabling transmission and reception to be executed
simultaneously.
• Consecutive serial communication
• Choice of LSB-first or MSB-first transfer
• Choice of a clock source
Pφ/4, Pφ/8, Pφ/16, Pφ/32, Pφ/64, Pφ/128, Pφ/256, or an external clock
• Five interrupt sources
transmit-end, transmit-data-register-empty, receive-data-full, overrun-error, and conflict error
• Module stop mode can be set*
Note: * Module stop mode has usage notes. For details, see section 14.6.2, Notes on Clearing
Module Stop Mode.
Section 14 Synchronous Serial Communication Unit (SSU)
Rev. 3.00 Mar. 14, 2006 Page 509 of 804
REJ09B0104-0300