Section 10 Programmable Pulse Generator (Ppg); Features; Figure 10.1 Block Diagram Of Ppg - Renesas H8SX/1500 Series Hardware Manual

32-bit cisc microcomputer
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Section 10 Programmable Pulse Generator (PPG)

The programmable pulse generator (PPG) provides pulse outputs by using the 16-bit timer pulse
unit (TPU) as a time base. The PPG pulse outputs are divided into 4-bit groups (groups 3 and 2)
that can operate both simultaneously and independently. Figure 10.1 shows a block diagram of the
PPG.
10.1

Features

• 8-bit output data
• Two output groups
• Selectable output trigger signals
• Non-overlapping mode
• Can operate together with the DMA controller (DMAC)
• Inverted output can be set
• Module stop mode can be set
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8
[Legend]
PMR:
PPG output mode register
PCR:
PPG output control register
NDERH:
Next data enable register H
NDERL:
Next data enable register L
Compare match signals
Control logic
Pulse output
pins, group 3
Pulse output
pins, group 2
Pulse output
pins, group 1
Pulse output
pins, group 0

Figure 10.1 Block Diagram of PPG

Section 10 Programmable Pulse Generator (PPG)
NDERH
NDERL
PMR
PCR
PODRH
NDRH
PODRL
NDRL
NDRH:
Next data register H
NDRL:
Next data register L
PODRH:
Output data register H
PODRL:
Output data register L
Rev. 3.00 Mar. 14, 2006 Page 345 of 804
Internal
data bus
REJ09B0104-0300

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