Figure 7.32 Example Of Transfer In Normal Transfer Mode Activated - Renesas H8SX/1500 Series Hardware Manual

32-bit cisc microcomputer
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Section 7 DMA Controller (DMAC)
Activation Timing by DREQ Low Level with NRD = 1
(6)
When the NRD bit in DMDR is set to 1, the timing of receiving the next transfer request is
delayed for one cycle.
Figure 7.32 shows an example of normal transfer mode activated by the DREQ signal low level
with NRD = 1.
The DREQ signal is sampled every cycle from the next rising edge of the Bφ signal immediately
after the DTE bit write cycle.
When a low level of the DREQ signal is detected while a transfer request by the DREQ signal is
enabled, a transfer request is held in the DMAC. When the DMAC is activated, the transfer
request is cleared. Receiving the next transfer request resumes after completion of the write cycle
and then a low level of the DREQ signal is detected. This operation is repeated until the transfer is
completed.
Bus released
DREQ
Address bus
Channel
Request
Min. of 3 cycles
[1]
[2]
After DMA transfer request is enabled, a low level of the DREQ signal is detected at the rising edge of the Bφ signal and a transfer
[1]
request is held.
[2][5] The DMAC is activated and the transfer request is cleared.
[3][6] A DMA cycle is started.
[4][7] Transfer request enable is resumed one cycle after completion of the write cycle.
(A low level of the DREQ signal is detected at the rising edge of the Bφ signal and a transfer request is held. This is the same as [1].)

Figure 7.32 Example of Transfer in Normal Transfer Mode Activated

Rev. 3.00 Mar. 14, 2006 Page 190 of 804
REJ09B0104-0300
DMA read
DMA read
cycle
cycle
Transfer
Transfer
destination
source
Duration of transfer request
disabled which is extended
by NRD
Duration of transfer
request disabled
[3]
Transfer request enable resumed
by DREQ Low Level with NRD = 1
DMA read
Bus released
cycle
Transfer
source
Duration of transfer
request disabled
Request
Min. of 3 cycles
[5]
[6]
[4]
DMA read
Bus released
cycle
Transfer
destination
Duration of transfer request
disabled which is extended
by NRD
[7]
Transfer request enable resumed

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