Register Descriptions; Interrupt Control Register (Intcr) - Renesas H8SX/1500 Series Hardware Manual

5.3

Register Descriptions

The interrupt controller has the following registers.

• Interrupt control register (INTCR)

• CPU priority control register (CPUPCR)
• Interrupt priority registers A to G, I, K to O, Q, and R (IPRA to IPRG, IPRI, IPRK to IPRO,
IPRQ, and IPRR)
• IRQ enable register (IER)
• IRQ sense control registers H and L (ISCRH, ISCRL)
• IRQ status register (ISR)
• Software standby release IRQ enable register (SSIER)
5.3.1 Interrupt Control Register (INTCR)
INTCR selects the interrupt control mode, and the detected edge for NMI.
Bit 7
Bit Name —
Initial Value 0
R/W R
Bit Bit Name

7, 6
5 INTM1
4 INTM0
6 5
— INTM1
0 0
R R/W
Initial
Value R/W Description
All 0 R Reserved
These are read-only bits and cannot be modified.
0 R/W Interrupt Control Select Mode 1 and 0
0 R/W These bits select either of two interrupt control modes
for the interrupt controller.
00: Interrupt control mode 0
01: Setting prohibited.
10: Interrupt control mode 2
11: Setting prohibited.
4 3
INTM0 NMIEG
0 0
R/W R/W
Interrupts are controlled by I bit in CCR.
Interrupts are controlled by bits I2 to I0 in EXR, and
IPR.
Rev. 3.00 Mar. 14, 2006 Page 89 of 804
Section 5 Interrupt Controller
2 1
— —
0 0
R R
REJ09B0104-0300
0
—
0
R