Figure 14.1 Block Diagram Of Ssu - Renesas H8SX/1500 Series Hardware Manual

32-bit cisc microcomputer

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Section 14 Synchronous Serial Communication Unit (SSU)

Figure 14.1 shows a block diagram of the SSU.

SSTDR0 to SSTDR3:

SSRDR0 to SSRDR3:

Rev. 3.00 Mar. 14, 2006 Page 510 of 804

REJ09B0104-0300

Module data bus

SS control register H

SS control register L

SS control register 2

SS mode register

SS enable register

SS status register

SS transmit data registers 0 to 3

SS receive data registers 0 to 3

SS shift register

Figure 14.1 Block Diagram of SSU

Control circuit

SSCK (External clock)

Internal data bus

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