Section 8 I/O Ports
8.1
Register Descriptions
Table 8.2 lists each port registers.
Table 8.2
Register Configuration in Each Port
Number of
Port
Pins
Port 1
8
1
Port 2*
4
Port 3
8
Port 4
8
Port 5
8
2
Port 6*
7
3
Port A*
7
Port D
8
Port H
8
Port J
8
Port K
8
[Legend]
O: Register exists
: No register exists
Notes: 1. The lower four bits are valid and the upper four bits are reserved. The write value
should always be the initial value.
2. The lower seven bits are valid and the upper one bit is reserved. The write value should
always be the initial value.
3. The upper seven bits are valid and the lower one bit is reserved. The write value should
always be the initial value.
Rev. 3.00 Mar. 14, 2006 Page 210 of 804
REJ09B0104-0300
DDR
DR
PORT
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Registers
ICR
PCR
ODR
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
PHRTIDR
O