Table 2.7 Logic Operation Instructions - Renesas H8SX/1500 Series Hardware Manual

Instruction Size

LDMAC

STMAC
Table 2.7 Logic Operation Instructions
Instruction Size
AND B/W/L
OR B/W/L
XOR B/W/L
NOT B/W/L
Function
Rs → MAC
Loads data from a general register to MAC.
MAC → Rd
Stores data from MAC to a general register.
Function
(EAd) ∧ #IMM → (EAd), (EAd) ∧ (EAs) → (EAd)
Performs a logical AND operation on data between immediate data,
general registers, and memory.
(EAd) ∨ #IMM → (EAd), (EAd) ∨ (EAs) → (EAd)
Performs a logical OR operation on data between immediate data,
general registers, and memory.
(EAd) ⊕ #IMM → (EAd), (EAd) ⊕ (EAs) → (EAd)
Performs a logical exclusive OR operation on data between immediate
data, general registers, and memory.
∼ (EAd) → (EAd)
Takes the one's complement of the contents of a general register or a
memory location.
Rev. 3.00 Mar. 14, 2006 Page 47 of 804
REJ09B0104-0300
Section 2 CPU