Figure 7.4 Data Flow In Single Address Mode - Renesas H8SX/1500 Series Hardware Manual

Section 7 DMA Controller (DMAC)
(2)
Single Address Mode
In single address mode, data between an external device and an external memory is directly
transferred using the DACK pin instead of DSAR or DDAR. A transfer at a time is performed in
one bus cycle. In this mode, the data bus width must be the same as the data access size. For
details on the data bus width, see section 6, Bus Controller (BSC).
The DMAC accesses an external device as the transfer source or destination by outputting the
strobe signal to the external device (DACK) and accesses the other transfer target by outputting
the address. Accordingly, the DMA transfer is performed in one bus cycle. Figure 7.4 shows an
example of a transfer between an external memory and an external device with the DACK pin. In
this example, the external device outputs data on the data bus and the data is written to the external
memory in the same bus cycle.
The transfer direction is decided by the DIRS bit in DACR which specifies an external device with
the DACK pin as the transfer source or destination. When DIRS = 0, data is transferred from an
external memory (DSAR) to an external device with the DACK pin. When DIRS = 1, data is
transferred from an external device with the DACK pin to an external memory (DDAR). The
settings of registers which are not used as the transfer source or destination are ignored.
The DACK signal output is enabled in single address mode by the DACKE bit in DMDR. The
DACK signal is low active.
The TEND signal output is enabled or disabled by the TENDE bit in DMDR. The TEND signal is
output in one bus cycle. When an idle cycle is inserted before the bus cycle, the TEND signal is
also output in the idle cycle.
Figure 7.5 shows an example of timing charts in single address mode and figure 7.6 shows an
example of operation in single address mode.
Rev. 3.00 Mar. 14, 2006 Page 160 of 804
REJ09B0104-0300
LSI
DMAC
DACK
DREQ
Data flow

Figure 7.4 Data Flow in Single Address Mode

External External
address bus data bus
External
memory
External device
with DACK