Figure 7.37 Example Of Transfer In Single Address Mode Activated - Renesas H8SX/1500 Series Hardware Manual

Activation Timing by DREQ Low Level with NRD = 1
(5)
When the NRD bit in DMDR is set to 1, the timing of receiving the next transfer request is
delayed for one cycle.
Figure 7.37 shows an example of single address mode activated by the DREQ signal low level
with NRD = 1.
The DREQ signal is sampled every cycle from the next rising edge of the Bφ signal immediately
after the DTE bit write cycle.
When a low level of the DREQ signal is detected while a transfer request by the DREQ signal is
enabled, a transfer request is held in the DMAC. When the DMAC is activated, the transfer
request is cleared. Receiving the next transfer request resumes after one cycle of the transfer
request duration inserted by NRD = 1 on completion of the single cycle and then a low level of the
DREQ signal is detected. This operation is repeated until the transfer is completed.
Bus
released
Bφ
DREQ
Address bus
Channel
Request
[1]
After DMA transfer request is enabled, a low level of the DREQ signal is detected at the rising edge of the Bφ signal and a transfer
[1]
request is held.
[2][5] The DMAC is activated and the transfer request is cleared.
[3][6] A DMA cycle is started.
[4][7] Transfer request enable is resumed one cycle after completion of the single cycle.
(A low level of the DREQ signal is detected at the rising edge of the Bφ signal and a transfer request is held. This is the same as [1].)

Figure 7.37 Example of Transfer in Single Address Mode Activated

DMA single
cycle
Transfer source/
Transfer destination
Duration of transfer request
disabled which is extended
Duration of transfer
request disabled
Min. of 3 cycles
[3]
[2]
by DREQ Low Level with NRD = 1
Bus
released
by NRD
Duration of transfer
request disabled
Request
Min. of 3 cycles
[4] [5] [6]
Transfer request
enable resumed
Rev. 3.00 Mar. 14, 2006 Page 195 of 804
Section 7 DMA Controller (DMAC)
DMA single Bus
cycle released
Transfer source/
Transfer destination
Duration of transfer request
disabled which is extended
by NRD
[7]
Transfer request
enable resumed
REJ09B0104-0300