Register Description; System Clock Control Register (Sckcr) - Renesas H8SX/1500 Series Hardware Manual

Section 18 Clock Pulse Generator
18.1

Register Description

The clock pulse generator has the following register.

• System clock control register (SCKCR)

18.1.1 System Clock Control Register (SCKCR)
SCKCR controls Bφ clock output and frequencies of the system, peripheral module, and external
clocks, and selects the Bφ clock to be output.
Bit 15
Bit Name PSTOP1
Initial Value 0
R/W R/W
Bit 7
Bit Name —
Initial Value 0
R/W R/W
Bit Bit Name
15 PSTOP1

14
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REJ09B0104-0300
14 13
— POSEL1
0 0
R/W R/W
6 5
PCK2 PCK1
0 1
R/W R/W
Initial
Value R/W Description
0 R/W Bφ Clock Output Enable
Controls φ output on PA7.
•
0: Bφ output
1: Fixed high
•
X: Fixed high
•
X: Hi-Z
0 R/W Reserved
This bit is always read as 0. The write value should
always be 0.
12 11
— —
0 0
R/W R/W
4 3
PCK0 —
0 0
R/W R/W
Normal operation
Software standby mode
Hardware standby mode
10 9
ICK2 ICK1
0 1
R/W R/W
2 1
BCK2 BCK1
0 1
R/W R/W
8
ICK0
0
R/W
0
BCK0
0
R/W