Serial Data Reception (Clocked Synchronous Mode); Figure 12.18 Example Of Operation For Reception In Clocked Synchronous Mode - Renesas H8SX/1500 Series Hardware Manual

Section 12 Serial Communication Interface (SCI)
12.6.4

Serial Data Reception (Clocked Synchronous Mode)

Figure 12.18 shows an example of SCI operation for reception in clocked synchronous mode. In
serial reception, the SCI operates as described below.
1. The SCI performs internal initialization in synchronization with a synchronization clock input
or output, starts receiving data, and stores the receive data in RSR.
2. If an overrun error (when reception of the next data is completed while the RDRF flag in SSR
is still set to 1) occurs, the ORER bit in SSR is set to 1. If the RIE bit in SCR is set to 1 at this
time, an ERI interrupt request is generated. Receive data is not transferred to RDR. The RDRF
flag remains to be set to 1.
3. If reception finishes successfully, the RDRF bit in SSR is set to 1, and receive data is
transferred to RDR. If the RIE bit in SCR is set to 1 at this time, an RXI interrupt request is
generated. Because the RXI interrupt processing routine reads the receive data transferred to
RDR before reception of the next receive data has finished, continuous reception can be
enabled.
Synchronization
clock
Serial data
RDRF
ORER

Figure 12.18 Example of Operation for Reception in Clocked Synchronous Mode

Transfer cannot be resumed while a receive error flag is set to 1. Accordingly, clear the ORER,
FER, PER, and RDRF bits to 0 before resuming reception. Figure 12.19 shows a sample flowchart
for serial data reception.
Rev. 3.00 Mar. 14, 2006 Page 426 of 804
REJ09B0104-0300
Bit 7 Bit 0
RXI interrupt RDR data read and
request RDRF flag cleared
generated to 0 in RXI interrupt
processing routine
1 frame
Bit 7 Bit 0 Bit 1
RXI interrupt
request generated
Bit 6 Bit 7
ERI interrupt request
generated by overrun
error