Section 13 Controller Area Network (HCAN)
13.6
DMAC Interface
The DMAC can be activated by the reception of a message in HCAN mailbox 0. When the
DMAC activation is set and DMAC transfer ends, flags RXPR0 and RFPR0 are automatically
cleared. An interrupt request is not sent to the CPU by a reception interrupt from the HCAN.
Figure 13.15 shows a DMAC transfer flowchart.
DMAC initialization
Activation source, source address,
destination address, transfer count, and
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Message reception in HCAN's
mailbox 0
DMAC activation
End of DMAC transfer?
Yes
DMAC transfer end bit setting
RXPR and RFPR clearing
DMAC interrupt enable = 1?
Yes
Interrupt to CPU
DMAC interrupt flag clearing
End
Figure 13.15 DMAC Transfer Flowchart
: Settings by user
: Processing by hardware
No
No