Section 19 Power-Down Modes
Operating State Sleep Mode
I/O port
Functions
Notes: "Halted (retained)" in the table means that the internal register values are retained and
internal operations are suspended.
1. SCI, HCAN, and SSU enter the reset state, and other peripheral modules retain their
states.
2. External interrupt and some internal interrupts (watchdog timer)
3. HCAN and SSU enter the reset state, and other peripheral modules retain their states.
Program execution state
Notes: 1. NMI, IRQ0 to IRQ14, and watchdog timer interrupts.
2. NMI and IRQ0 to IRQ14. Note that IRQ is valid only when the corresponding bit in SSIER is set to 1.
19.2
Register Descriptions
The registers related to the power-down modes are shown below. For details on the system clock
control register (SCKCR), refer to section 18.1.1, System Clock Control Register (SCKCR).
• Standby control register (SBYCR)
• Module stop control register A (MSTPCRA)
• Module stop control register B (MSTPCRB)
• Module stop control register C (MSTPCRC)
Rev. 3.00 Mar. 14, 2006 Page 672 of 804
REJ09B0104-0300
All-Module-Clock-Stop Mode Software Standby Mode
Retained
Reset state
RES pin = high
Transition after exception handling
Figure 19.1 Mode Transitions
Retained
SSBY = 0
SLEEP
instruction
SSBY = 0, ACSE = 1
All interrupts
MSTPCR = H'F[0-F]FFFFFF
SLEEP instruction
1
Interrupt*
SLEEP instruction
SSBY = 1
External
2
interrupt*
Software standby mode
Program halted state
Sleep mode
All-module-clock-
stop mode