Edge
TCLKA
detection
TCLKB
circuit
Figure 9.30 Phase Counting Mode Application Example
Channel 1
TCNT_1
TGRA_1
(speed cycle capture)
TGRB_1
(position cycle capture)
TCNT_0
TGRA_0
(speed control cycle)
TGRC_0
(position control cycle)
TGRB_0 (pulse width capture)
TGRD_0 (buffer operation)
Channel 0
Section 9 16-Bit Timer Pulse Unit (TPU)
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Rev. 3.00 Mar. 14, 2006 Page 325 of 804
REJ09B0104-0300