Table of Contents
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Section 1 Overview................................................................................................1
1.1
Features.................................................................................................................................. 1
1.2
Block Diagram ....................................................................................................................... 2
1.3
Pin Assignments..................................................................................................................... 4
1.3.1
Pin Assignments ....................................................................................................... 4
1.3.2
Pin Configuration in Each Operating Mode.............................................................. 6
1.3.3
Pin Functions .......................................................................................................... 10
Section 2 CPU......................................................................................................19
2.1
Features................................................................................................................................ 19
2.2
CPU Operating Modes......................................................................................................... 21
2.2.1
Normal Mode.......................................................................................................... 21
2.2.2
Middle Mode .......................................................................................................... 23
2.2.3
Advanced Mode...................................................................................................... 24
2.2.4
Maximum Mode ..................................................................................................... 25
2.3
Instruction Fetch .................................................................................................................. 27
2.4
Address Space...................................................................................................................... 27
2.5
Registers............................................................................................................................... 28
2.5.1
General Registers.................................................................................................... 29
2.5.2
Program Counter (PC) ............................................................................................ 30
2.5.3
Condition-Code Register (CCR)............................................................................. 30
2.5.4
Extended Control Register (EXR) .......................................................................... 32
2.5.5
Vector Base Register (VBR)................................................................................... 32
2.5.6
Short Address Base Register (SBR)........................................................................ 32
2.5.7
Multiply-Accumulate Register (MAC)................................................................... 33
2.5.8
Initial Values of CPU Registers .............................................................................. 33
2.6
2Data Formats...................................................................................................................... 33
2.6.1
General Register Data Formats ............................................................................... 33
2.6.2
Memory Data Formats ............................................................................................ 35
2.7
Instruction Set ...................................................................................................................... 36
2.7.1
Instructions and Addressing Modes........................................................................ 38
2.7.2
Table of Instructions Classified by Function .......................................................... 42
2.7.3
Basic Instruction Formats ....................................................................................... 53
2.8
Addressing Modes and Effective Address Calculation........................................................ 54
2.8.1
Register Direct-Rn ............................................................................................... 55
2.8.2
Register Indirect-@ERn ....................................................................................... 55
Contents
Rev. 3.00 Mar. 14, 2006 Page ix of xxxviii
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