A/D Data Registers A To H (Addra To Addrh); Table 15.2 Analog Input Channels And Corresponding Addr Registers - Renesas H8SX/1500 Series Hardware Manual

Section 15 A/D Converter
15.3.1

A/D Data Registers A to H (ADDRA to ADDRH)

There are eight 16-bit read-only ADDR registers, ADDRA to ADDRH, used to store the results of
A/D conversion. The ADDR registers, which store a conversion result for each channel, are shown
in table 15.2.
The converted 10-bit data is stored in bits 15 to 6. The lower 6-bit data is always read as 0.
The data bus between the CPU and the A/D converter has a 16-bit width. The data can be read
directly from the CPU. ADDR must not be accessed in 8-bit units and must be accessed in 16-bit
units.
Bit 15 14
Bit Name
Initial Value 0 0
R/W R R

Table 15.2 Analog Input Channels and Corresponding ADDR Registers

Analog Input Channel
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Rev. 3.00 Mar. 14, 2006 Page 552 of 804
REJ09B0104-0300
13 12 11 10
0 0 0 0
R R R R
A/D Data Register Which Stores Conversion Result
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
9 8 7 6
0 0 0 0
R R R R
5 4 3 2
— — — —
0 0 0 0
R R R R
1 0
— —
0 0
R R